View source for DSP Binary

{| class="wikitable" border="1"
!  Offset
!  Size
!  Description
|-
| 0x0
| 0x100
| RSA Signature over bytes 0x100-0x300
|-
| 0x100
| 4
| Magic ('DSP1')
|-
| 0x104
| 4
| DSP binary size
|-
| 0x108
| 2
| Memory layout (bits 0-7: Program ram, 8-15: Data ram). Each bit represents a memory region. The region is always 0x8000 bytes in size (the first region starts at 0x1FF00000; the next is a 0x1FF08000 and so on). The HW registers for DSP memory configuration are [[CONFIG11_Registers#CFG11_SHAREDWRAM_32K_DATA|CFG11_SHAREDWRAM_32K_DATA]] and [[CONFIG11_Registers#CFG11_SHAREDWRAM_32K_CODE|CFG11_SHAREDWRAM_32K_CODE]], located at physical address 0x10140000 (mapped to 0x1EC40000).
|-
| 0x10C
| 1
|?
|-
| 0x10D
| 1
| Special segment memory type (0=1=0x1FF00000(Program ram)+,2=0x1FF40000(Data ram)+)
|-
| 0x10E
| 1
| Num segments (must be 1-10)
|-
| 0x10F
| 1
| Flags: 

bit0: if set, DSP module calls [[DSP:RecvData]] on all three registers and expects them to reply value 1

bit1: if set, load special segment
|-
| 0x110
| 4
| Special segment Start address in 16-bit words
|-
| 0x114
| 4
| Special segment size in bytes
|-
| 0x118
| 8
| Zero
|-
| 0x120
| 0x30*10
| Segment records
|}

If "special segment" flag is set, 0x214 bytes are read from [[CfgS:GetConfigInfoBlk8]] block 0x70000, and then copied to the special segment given. If the reading fails, zeroes are written in its place. The purpose of this segment is currently unknown. 

Each segment record:

{| class="wikitable" border="1"
!  Offset
!  Size
!  Description
|-
| 0
| 4
| Offset data
|-
| 4
| 4
| Start address in 16-bit words (must be < 0x20000 for type 0, < 0x10000 for type 1,2)
|-
| 8
| 4
| Size in bytes
|-
| 15
| 1
| Memory type (0=1=0x1FF00000 (Program ram)+,2=0x1FF40000 (Data ram)+)
|-
| 16
| 32
| SHA256 hash of segment
|}

The normal ending of this files is *.cdc

[[Category:File formats]]
[[Category:DSP]]