EMMC Registers: Difference between revisions

Revision as of 16:49, 15 May 2018 view source Yellows8 (talk \| contribs) Bureaucrats, Administrators 6,264 edits mNo edit summary ← Older edit		Revision as of 18:13, 15 May 2018 view source Profi200 (talk \| contribs) Trusted 137 edits m Actually correct this. Newer edit →
Line 1:		Line 1:
	These registers are used to access the system [[Flash_Filesystem\|NAND]] and the inserted SD card. Both devices use the same interface. ~~Despite the bus clock~~ of the ~~ARM9 being~~ double of the DSi ~~in 3DS mode the SDMMC controller has~~ HCLK~~=33.513982 MHz~~.		These registers are used to access the system [[Flash_Filesystem\|NAND]] and the inserted SD card. Both devices use the same interface. HCLK of the SDMMC controller is 67.027964 MHz (double of the DSi HCLK).

	=Registers=		=Registers=