User contributions for Profi200
26 September 2024
- 21:0321:03, 26 September 2024 diff hist +403 I2S Registers No edit summary current
15 February 2021
- 01:0901:09, 15 February 2021 diff hist +36 m SPI Registers →NSPI_FIFO current
- 01:0801:08, 15 February 2021 diff hist +37 m SPICARD Registers →NSPI_FIFO current
13 February 2021
- 03:1303:13, 13 February 2021 diff hist +52 m Gamecards →SPI flash: Clock polarity and phase.
29 January 2021
- 14:5114:51, 29 January 2021 diff hist +180 Corelink DMA Engines →XDMA Peripheral IDs current
28 May 2020
- 15:2915:29, 28 May 2020 diff hist +12 m CONFIG9 Registers →CFG9_SDMMCCTL: Oops
- 00:3300:33, 28 May 2020 diff hist 0 m CONFIG11 Registers →LGY_MODE: Oops.
- 00:2500:25, 28 May 2020 diff hist −46 m IO Registers →Overview
- 00:1800:18, 28 May 2020 diff hist +325 CONFIG9 Registers →CFG9_SDMMCCTL: ARM11 SD card access hype.
7 May 2020
- 15:5315:53, 7 May 2020 diff hist +18 m GPU/External Registers →LCD Source Framebuffer Setup: Forgot to mention which screen.
- 15:5215:52, 7 May 2020 diff hist −41 m GPU/External Registers →LCD Source Framebuffer Setup: Oops.
- 15:5115:51, 7 May 2020 diff hist +39 m GPU/External Registers →LCD Source Framebuffer Setup: PAL emulator hype.
- 15:3915:39, 7 May 2020 diff hist +5 m CONFIG11 Registers →LGY_PADCNT: Broken link.
- 15:3515:35, 7 May 2020 diff hist +389 GPU/External Registers →LCD Source Framebuffer Setup
25 April 2020
- 16:3416:34, 25 April 2020 diff hist +352 HID Registers No edit summary
- 16:2016:20, 25 April 2020 diff hist +1 m CONFIG11 Registers →LGY_PADCNT: Come on.
- 16:1916:19, 25 April 2020 diff hist −4 m CONFIG11 Registers →LGY_MODE
- 16:1816:18, 25 April 2020 diff hist +62 m CONFIG11 Registers →LGY_PADCNT
- 16:1416:14, 25 April 2020 diff hist +902 CONFIG11 Registers Some juicy legacy mode details.
26 November 2019
- 16:3816:38, 26 November 2019 diff hist +1 m I2S Registers No edit summary
- 16:3716:37, 26 November 2019 diff hist +713 I2S Registers No edit summary
28 June 2019
- 01:4501:45, 28 June 2019 diff hist +39 m SPI Registers →Registers
- 01:4201:42, 28 June 2019 diff hist +33 m SPICARD Registers →Registers
27 June 2019
9 June 2019
- 01:2601:26, 9 June 2019 diff hist +67 m CONFIG11 Registers →CFG11_GPU_CNT
15 May 2019
- 21:4621:46, 15 May 2019 diff hist +181 m NDMA Registers →Startup modes (27-24)
- 20:4420:44, 15 May 2019 diff hist +164 m SHA Registers →SHA_CNT current
- 15:1715:17, 15 May 2019 diff hist +37 m RSA Registers →RSA_CNT
11 May 2019
- 22:5222:52, 11 May 2019 diff hist +11 m SPI Registers →NSPI_AUTOPOLL
- 22:4522:45, 11 May 2019 diff hist 0 m ARM11 Interrupts →Hardware Interrupts: Oops
- 22:4322:43, 11 May 2019 diff hist +37 m ARM11 Interrupts →Hardware Interrupts
- 22:4122:41, 11 May 2019 diff hist +1,292 SPI Registers →Registers
9 May 2019
- 20:5120:51, 9 May 2019 diff hist 0 m SPICARD Registers →Registers: Bit range consistency.
- 20:4920:49, 9 May 2019 diff hist +20 m SPICARD Registers →NSPI_BLKLEN
- 17:2317:23, 9 May 2019 diff hist +1,198 SPICARD Registers →Registers: Added missing registers.
8 May 2019
- 02:0502:05, 8 May 2019 diff hist +136 m SPICARD Registers →REG_SPICARDCNT
7 May 2019
- 20:3620:36, 7 May 2019 diff hist −104 SPI Registers →Registers: Use same naming scheme as NDMA
- 20:2520:25, 7 May 2019 diff hist +24 m SPI Registers →SPI_NEW_CNT
- 19:3719:37, 7 May 2019 diff hist +906 SPI Registers →Registers
- 18:0318:03, 7 May 2019 diff hist 0 m CONFIG11 Registers →Registers
- 18:0118:01, 7 May 2019 diff hist +33 m CONFIG9 Registers →CFG9_CARDCTL
28 April 2019
- 18:1218:12, 28 April 2019 diff hist −1 m I2C Registers →Device 3
20 April 2019
- 21:5421:54, 20 April 2019 diff hist +60 m SPI Registers →SPI_NEW_STATUS
- 21:5221:52, 20 April 2019 diff hist +90 m SPI Registers →SPI_NEW_DONE
- 21:4821:48, 20 April 2019 diff hist +12 m SPI Registers →SPI_NEW_CNT
- 16:4716:47, 20 April 2019 diff hist +27 m ARM11 Interrupts →Hardware Interrupts
29 May 2018
- 20:1020:10, 29 May 2018 diff hist +53 m CONFIG9 Registers →CFG9_SDMMCCTL
- 19:4019:40, 29 May 2018 diff hist −3 m CONFIG9 Registers No edit summary
28 May 2018
- 20:0220:02, 28 May 2018 diff hist +15 m CONFIG9 Registers →CFG9_SDSLOTCTL
- 18:2518:25, 28 May 2018 diff hist +13 m CONFIG9 Registers →CFG9_SDSLOTCTL