SPICARD Registers: Difference between revisions
m →Registers: Bit range consistency. |
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| Data | | Data | ||
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This FIFO is one way (half-duplex). | |||
== NSPI_STATUS == | == NSPI_STATUS == | ||
| Line 150: | Line 152: | ||
|- | |- | ||
| 0 | | 0 | ||
| Transfer finished | | Transfer finished (1 = disabled) | ||
|- | |- | ||
| 1 | | 1 | ||
| Line 165: | Line 167: | ||
|- | |- | ||
| 0 | | 0 | ||
| Transfer finished? | | Transfer finished (also fires on each autopoll try?) | ||
|- | |- | ||
| 1 | | 1 | ||