CONFIG11 Registers: Difference between revisions
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| [[# | | [[#PDN_MPCORE_CLKCNT|PDN_MPCORE_CLKCNT]] | ||
| 0x10141300 | | 0x10141300 | ||
| 2 | | 2 | ||
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Note that the above PDN_MPCORE_CFG bit is 1 on New3DS, and 0 on Old3DS. Since this SVC is only available with the New3DS ARM11-kernel, the only additional available clock-rate is 804MHz when running on New3DS(with official kernel code). | Note that the above PDN_MPCORE_CFG bit is 1 on New3DS, and 0 on Old3DS. Since this SVC is only available with the New3DS ARM11-kernel, the only additional available clock-rate is 804MHz when running on New3DS(with official kernel code). | ||
The following other register value(s) were tested on New3DS, which are not used by the kernel: | |||
* 0x6: entire system hangs. | |||
== PDN_MPCORE_CNT == | == PDN_MPCORE_CNT == | ||