I2C Registers: Difference between revisions

Reboot Device 3
Optimization tricks Device 3
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   s* = shared register (explaination below this table)
   s* = shared register (explaination below this table)
   ds = dynamic shared (explaination below this table)
   ds = dynamic shared (explaination below this table)
Reading or writing multiple bytes from/to single-byte registers increments the register ID along with it. For example reading two bytes from reg 0x00 reads regs 0x00 and 0x01.
This is not the case for multibyte regs (0x29, 0x2D, 0x4F, 0x61 and 0x7F), plus reg 0x60.
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  REGISTER
!  REGISTER
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| 0x29
| 0x29
| sd(5)
| sd(5)
| ??
| rw
| Power mode indicator state (read-write)
| Power mode indicator state (read-write)
   1 = forced default blue
   1 = forced default blue
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|-
|-
| 0x60
| 0x60
| ds
| d
| rw
| rw
| Free register bank address select
| Free register bank address (index) select
Selects the index to read from in the free register bank, up to 200 (?). Used with reg 0x61.
Selects the index to read from in the free register bank, up to 200. Used in conjunction with reg 0x61.
 
Reading from this register seem to read N bytes from the bank while incrementing the internal index by the same amount.


   byte 0: bit0 = "WirelessDisabled", bit1 = "SoftwareClosed", bit2 = "PowerOffInitiated", bit3 = "LgyNativeResolution", bit4 = "LegacyJumpProhibited"
   byte 0: bit0 = "WirelessDisabled", bit1 = "SoftwareClosed", bit2 = "PowerOffInitiated", bit3 = "LgyNativeResolution", bit4 = "LegacyJumpProhibited"
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|-
|-
| 0x61
| 0x61
| ds(0x100)
| d(200)
| rw
| rw
| Free register bank, data is read from/written to here.
| Free register bank, data is read from/written to here.


Writing to here seems to increment the internal index?
Accessing N bytes of this register increments the selected index by N.
|-
|-
| 0x62 - 0x7E
| 0x62 - 0x7E