3dbrew

ARM11 Interrupts: Difference between revisions

← Older editNewer edit →
Profi200 (talk | contribs)
Trusted
137 edits
mNo edit summary
(4 intermediate revisions by the same user not shown)
Line 106: Line 106:
| P3D
| P3D
|-
|-
| 0x30
| 0x30-0x38
| Kernel
| Kernel
| ?
| Old CDMA Event 0..8 (9 separate IRQ lines)
|-
|-
| 0x39
| 0x39
| Kernel
| Kernel
| DMA
| Old CDMA Faulting (eg. CCR=0, or event>15)
|-
|-
| 0x3A
| 0x3A
| Kernel
| Kernel
| DMA
| New CDMA Event 0..31 (shared IRQ line)
|-
|-
| 0x3B
| 0x3B
| Kernel
| Kernel
| DMA
| New CDMA Faulting (eg. CCR=0)
|-
|-
| 0x40
| 0x40
Line 128: Line 128:
| 0x41
| 0x41
| nwm
| nwm
| ?
| WIFI SDIO Controller IRQ pin @ 0x10122000
|-
|-
| 0x42
| 0x42
| nwm_dev?
| nwm_dev?
| WIFI SDIO Controller @ 0x10100000
| Debug WIFI SDIO Controller @ 0x10100000 ?
|-
| 0x43
| nwm_dev?
| Debug WIFI SDIO Controller @ 0x10100000 ?
|-
| 0x44
| ?
| NTRCARD (maybe?)
|-
|-
| 0x45
| 0x45
| mvd (New3DS)
| mvd (New3DS)
| ?
| L2B_0 (First RGB-to-RGBA Converter)
|-
|-
| 0x46
| 0x46
| mvd (New3DS)
| mvd (New3DS)
| ?
| L2B_1 (Second RGB-to-RGBA Converter)
|-
|-
| 0x48
| 0x48
| camera
| camera
| ?
| Camera Bus 0 (DSi cameras)
|-
|-
| 0x49
| 0x49
| camera
| camera
| ?
| Camera Bus 1 (left-eye)
|-
|-
| 0x4A
| 0x4A
Line 160: Line 168:
| 0x4C
| 0x4C
| TwlBg
| TwlBg
| ?
| LGYFB_0 Legacy GBA/NDS Video
|-
|-
| 0x4D
| 0x4D
| TwlBg
| TwlBg
| ?
| LGYFB_1 Legacy GBA/NDS Video
|-
|-
| 0x4E
| 0x4E
Line 172: Line 180:
| 0x4F
| 0x4F
| mvd (New3DS)
| mvd (New3DS)
| Related to mvd services
| MVD general interrupt?
|-
|-
| 0x50
| 0x50
| pxi, TwlBg
| pxi, TwlBg
| Sync
| Sync (bit 29 from Arm9's PXI_SYNC)
|-
|-
| 0x51
| 0x51
| pxi, TwlBg
| pxi, TwlBg
| ?
| Sync 2 (bit 30 from Arm9's PXI_SYNC)
|-
|-
| 0x52
| 0x52
Line 208: Line 216:
| 0x58
| 0x58
| Kernel
| Kernel
| PDN
| PDN Wake Event
|-
|-
| 0x59
| 0x59
| TwlBg
| TwlBg
| ?
| PDN Legacy Sleep
|-
|-
| 0x5A
| 0x5A
| mic
| mic
| ?
| General microphone interrupt (?)
|-
|-
| 0x5C
| 0x5C
| i2c, TwlBg
| i2c, TwlBg
| I2C Bus2 work done
| I2C Bus2 work done
|-
| 0x5F
| mp
| DS WiFi registers
|-
|-
| 0x60
| 0x60
Line 232: Line 244:
| 0x63
| 0x63
| gpio, TwlBg
| gpio, TwlBg
| Touchscreen
| Touchscreen Pen Down
|-
|-
| 0x64
| 0x64
Line 240: Line 252:
| 0x66
| 0x66
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA1.bit1 (sfio = ?)
|-
|-
| 0x68
| 0x68
| gpio, TwlBg
| gpio, TwlBg
| IR
| C-stick Interrupt
|-
|-
| 0x69
| 0x69
| gpio, TwlBg
| gpio, TwlBg
| ?
| IrDA Interrupt
|-
|-
| 0x6A
| 0x6A
| gpio, TwlBg
| gpio, TwlBg
| ?
| Gyro Interrupt
|-
|-
| 0x6B
| 0x6B
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit3 (sfio = ?)
|-
|-
| 0x6C
| 0x6C
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit4 (sfio = ?)
|-
|-
| 0x6D
| 0x6D
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit5 (sfio = ?)
|-
|-
| 0x6E
| 0x6E
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit6 (sfio = ?)
|-
|-
| 0x6F
| 0x6F
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit7 (sfio = ?)
|-
|-
| 0x70
| 0x70
| gpio, TwlBg
| gpio, TwlBg
| ?
| GPIO_DATA3.bit8 (sfio = ?)
|-
|-
| 0x71
| 0x71
| gpio, TwlBg
| gpio, TwlBg
| MCU (HOME/POWER pressed/released or WiFi switch pressed)
| MCU (HOME/POWER pressed/released or WiFi switch pressed, etc.)
|-
|-
| 0x72
| 0x72
| gpio, TwlBg
| gpio, TwlBg
| ?
| NFC
|-
|-
| 0x73
| 0x73
| TwlBg
| TwlBg
| ?
| GPIO_DATA3.bit11 (sfio = ?)
|-
|-
| 0x74
| 0x74
Line 297: Line 309:
| ?
| ?
| Gamecard inserted
| Gamecard inserted
|-
| 0x76
| -
| L2C
|-
|-
| 0x78 to 0x7B
| 0x78 to 0x7B
Line 305: Line 321:
0x7C to 0x84 (bit2 clear)
0x7C to 0x84 (bit2 clear)
| Kernel
| Kernel
| ?
| Other PMU interrupts (line may not exist at all)
|}
|}
(interrupts from 0x80 and up can't be mapped in available builds of the kernel)
(interrupts from 0x80 and up can't be mapped in available builds of the kernel)




There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core.  The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8).  The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core.  The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8).  The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
 
The Arm11 kernel configures interrupts the following way:
 
<nowiki>Interrupts 0x00 to 0x1F: edge-triggered, N-N
Interrupt 0x20: level-sensitive, 1-N
Interrupt 0x21: level-sensitive, 1-N
Interrupt 0x22: level-sensitive, 1-N
Interrupt 0x23: level-sensitive, 1-N
Interrupt 0x24: edge-triggered, 1-N
Interrupt 0x25: level-sensitive, 1-N
Interrupt 0x28: level-sensitive, 1-N
Interrupt 0x29: level-sensitive, 1-N
Interrupt 0x2a: level-sensitive, 1-N
Interrupt 0x2b: level-sensitive, 1-N
Interrupt 0x2c: level-sensitive, 1-N
Interrupt 0x2d: level-sensitive, 1-N
Interrupt 0x30: level-sensitive, 1-N
Interrupt 0x31: level-sensitive, 1-N
Interrupt 0x32: level-sensitive, 1-N
Interrupt 0x33: level-sensitive, 1-N
Interrupt 0x34: level-sensitive, 1-N
Interrupt 0x35: level-sensitive, 1-N
Interrupt 0x36: level-sensitive, 1-N
Interrupt 0x37: level-sensitive, 1-N
Interrupt 0x38: level-sensitive, 1-N
Interrupt 0x39: level-sensitive, 1-N
Interrupt 0x3a: level-sensitive, 1-N
Interrupt 0x3b: level-sensitive, 1-N
Interrupt 0x40: edge-triggered, 1-N
Interrupt 0x41: edge-triggered, 1-N
Interrupt 0x42: edge-triggered, 1-N
Interrupt 0x43: edge-triggered, 1-N
Interrupt 0x44: edge-triggered, 1-N
Interrupt 0x45: edge-triggered, 1-N
Interrupt 0x46: edge-triggered, 1-N
Interrupt 0x48: edge-triggered, 1-N
Interrupt 0x49: edge-triggered, 1-N
Interrupt 0x4a: edge-triggered, 1-N
Interrupt 0x4b: edge-triggered, 1-N
Interrupt 0x4c: edge-triggered, 1-N
Interrupt 0x4d: edge-triggered, 1-N
Interrupt 0x4e: edge-triggered, 1-N
Interrupt 0x4f: level-sensitive, 1-N
Interrupt 0x50: edge-triggered, 1-N
Interrupt 0x51: edge-triggered, 1-N
Interrupt 0x52: edge-triggered, 1-N
Interrupt 0x53: edge-triggered, 1-N
Interrupt 0x54: edge-triggered, 1-N
Interrupt 0x55: edge-triggered, 1-N
Interrupt 0x56: edge-triggered, 1-N
Interrupt 0x57: edge-triggered, 1-N
Interrupt 0x58: level-sensitive, 1-N
Interrupt 0x59: edge-triggered, 1-N
Interrupt 0x5a: edge-triggered, 1-N
Interrupt 0x5b: edge-triggered, 1-N
Interrupt 0x5f: edge-triggered, 1-N
Interrupt 0x60: edge-triggered, 1-N
Interrupt 0x61: edge-triggered, 1-N
Interrupt 0x64: edge-triggered, 1-N
Interrupt 0x65: edge-triggered, 1-N
Interrupt 0x66: edge-triggered, 1-N
Interrupt 0x68: edge-triggered, 1-N
Interrupt 0x69: edge-triggered, 1-N
Interrupt 0x6a: edge-triggered, 1-N
Interrupt 0x6b: edge-triggered, 1-N
Interrupt 0x6c: edge-triggered, 1-N
Interrupt 0x6d: edge-triggered, 1-N
Interrupt 0x6e: edge-triggered, 1-N
Interrupt 0x6f: edge-triggered, 1-N
Interrupt 0x70: edge-triggered, 1-N
Interrupt 0x71: edge-triggered, 1-N
Interrupt 0x72: edge-triggered, 1-N
Interrupt 0x73: edge-triggered, 1-N
Interrupt 0x74: edge-triggered, 1-N
Interrupt 0x75: edge-triggered, 1-N
Interrupt 0x76: level-sensitive, 1-N
Interrupt 0x77: level-sensitive, 1-N
Interrupt 0x78: edge-triggered, 1-N
Interrupt 0x79: level-sensitive, 1-N
Interrupt 0x7a: level-sensitive, 1-N
Interrupt 0x7b: level-sensitive, 1-N
Interrupt 0x7c: level-sensitive, 1-N
Interrupt 0x7d: level-sensitive, 1-N</nowiki>


= InterruptData =
= InterruptData =
Retrieved from "https://www.3dbrew.org/wiki/ARM11_Interrupts"