1,434
edits
Changes
Jump to navigation
Jump to search
mLine 7,045:
Line 7,045: + + Line 7,100:
Line 7,102: + + Line 7,175:
Line 7,179: + + Line 7,187:
Line 7,193: + + Line 7,218:
Line 7,226: + + Line 7,298:
Line 7,308: + + Line 7,313:
Line 7,325: + + Line 7,323:
Line 7,337: + + Line 7,337:
Line 7,353: − | 0x0 − |- − | 16-23 Line 7,347:
Line 7,360: + + Line 7,357:
Line 7,372: + + Line 7,367:
Line 7,384: + + Line 7,377:
Line 7,396: + + Line 7,387:
Line 7,408: + + Line 7,397:
Line 7,420: + + Line 7,408:
Line 7,433: − + Line 7,437:
Line 7,462: − Line 7,465:
Line 7,489: + + Line 7,475:
Line 7,501: + + Line 7,485:
Line 7,513: + + Line 7,495:
Line 7,525: + + Line 7,505:
Line 7,537: + + Line 7,515:
Line 7,549: + + Line 7,525:
Line 7,561: + + Line 7,534:
Line 7,572: − |- − | 8-31 − | 0x0 + + Line 7,548:
Line 7,585: − + − + Line 7,563:
Line 7,600: + + Line 7,573:
Line 7,612: + + Line 7,583:
Line 7,624: + + Line 7,591:
Line 7,634: − + − |- − | 9 − | 0x0 − |- − | 16-31 − | 0x0 − + − + + + + Line 7,615:
Line 7,655: + + Line 7,627:
Line 7,669: − |- − | 16 − | 0x0 + + Line 7,663:
Line 7,704: + +
→Geometry pipeline registers
| unsigned, Vertex arrays base address
| unsigned, Vertex arrays base address
|}
|}
This register sets the base address of all vertex arrays.
=== GPUREG_ATTRIBBUFFERS_FORMAT_LOW ===
=== GPUREG_ATTRIBBUFFERS_FORMAT_LOW ===
| unsigned, Vertex attribute 7 size
| unsigned, Vertex attribute 7 size
|}
|}
This register configures the types and sizes of the first 8 vertex attributes.
Vertex attribute type values:
Vertex attribute type values:
| unsigned, Total vertex attribute count - 1
| unsigned, Total vertex attribute count - 1
|}
|}
This register configures the types and sizes of the last 4 vertex attributes, along with the attribute mask and the total attribute count.
See GPUREG_ATTRIBBUFFERS_FORMAT_LOW for vertex attribute type and size values.
See GPUREG_ATTRIBBUFFERS_FORMAT_LOW for vertex attribute type and size values.
| unsigned, Offset from base vertex arrays address
| unsigned, Offset from base vertex arrays address
|}
|}
This register configures the offset of a vertex array from the base vertex arrays address.
=== GPUREG_ATTRIBBUFFER''i''_CONFIG1 ===
=== GPUREG_ATTRIBBUFFER''i''_CONFIG1 ===
| unsigned, Component 8
| unsigned, Component 8
|}
|}
This register configures the first 8 component types of a vertex array.
Component values:
Component values:
| unsigned, Total number of components
| unsigned, Total number of components
|}
|}
This register configures the last 4 component types of a vertex array, along with the bytes per vertex and the total number of components.
See GPUREG_ATTRIBBUFFER''i''_CONFIG1 for component values.
See GPUREG_ATTRIBBUFFER''i''_CONFIG1 for component values.
| Index type (0 = unsigned byte, 1 = unsigned short or drawing arrays)
| Index type (0 = unsigned byte, 1 = unsigned short or drawing arrays)
|}
|}
This register configures the index array used when drawing elements.
=== GPUREG_NUMVERTICES ===
=== GPUREG_NUMVERTICES ===
| unsigned, Number of vertices to render
| unsigned, Number of vertices to render
|}
|}
This register sets the number of vertices to render.
=== GPUREG_GEOSTAGE_CONFIG ===
=== GPUREG_GEOSTAGE_CONFIG ===
|-
|-
| 9
| 9
| 0x0
| 0x0
|-
|-
This register configures the geometry stage of the GPU pipeline.
This register configures the geometry stage of the GPU pipeline.
When using vertex buffers and drawing elements in triangles mode, bit 8 is set to 1, else it is set to 0.
=== GPUREG_VERTEX_OFFSET ===
=== GPUREG_VERTEX_OFFSET ===
| unsigned, Starting vertex offset
| unsigned, Starting vertex offset
|}
|}
This register sets the offset of the first vertex in an array to render.
=== GPUREG_POST_VERTEX_CACHE_NUM ===
=== GPUREG_POST_VERTEX_CACHE_NUM ===
| unsigned, Number of entries in the post-vertex cache (usually 0x4 or 0x84)
| unsigned, Number of entries in the post-vertex cache (usually 0x4 or 0x84)
|}
|}
This register configures the post-vertex cache.
=== GPUREG_DRAWARRAYS ===
=== GPUREG_DRAWARRAYS ===
| unsigned, Trigger (0 = idle, non-zero = draw arrays)
| unsigned, Trigger (0 = idle, non-zero = draw arrays)
|}
|}
This register triggers drawing vertex arrays.
=== GPUREG_DRAWELEMENTS ===
=== GPUREG_DRAWELEMENTS ===
| unsigned, Trigger (0 = idle, non-zero = draw elements)
| unsigned, Trigger (0 = idle, non-zero = draw elements)
|}
|}
This register triggers drawing vertex array elements.
=== GPUREG_VTX_FUNC ===
=== GPUREG_VTX_FUNC ===
| unsigned, Trigger (0 = idle, non-zero = clear post-vertex cache)
| unsigned, Trigger (0 = idle, non-zero = clear post-vertex cache)
|}
|}
This register triggers clearing the post-vertex cache.
=== GPUREG_FIXEDATTRIB_INDEX ===
=== GPUREG_FIXEDATTRIB_INDEX ===
|}
|}
See [[GPU/Fixed Vertex Attributes]] and [[GPU/Immediate-Mode Vertex Submission]] for usage info.
This register selects the index of the fixed attribute to be input with GPUREG_FIXEDATTRIB_DATA''i''. See [[GPU/Fixed Vertex Attributes]] and [[GPU/Immediate-Mode Vertex Submission]] for usage info.
=== GPUREG_FIXEDATTRIB_DATA0 ===
=== GPUREG_FIXEDATTRIB_DATA0 ===
| float1.7.16, Vertex attribute element 3 (lower 16 bits)
| float1.7.16, Vertex attribute element 3 (lower 16 bits)
|}
|}
Accepts the second part of the four 24-bit floating-point values that make up a vertex attribute. Stored in the fixed attribute currently specified with GPUREG_FIXEDATTRIB_INDEX. If immediate-mode vertex submission is enabled (by writing 0xF to the index register) then vertex data is input here directly.
Accepts the second part of the four 24-bit floating-point values that make up a vertex attribute. Stored in the fixed attribute currently specified with GPUREG_FIXEDATTRIB_INDEX. If immediate-mode vertex submission is enabled (by writing 0xF to the index register) then vertex data is input here directly.
| unsigned, Size of command buffer 0 >> 3
| unsigned, Size of command buffer 0 >> 3
|}
|}
This register sets the size of the first command buffer.
=== GPUREG_CMDBUF_SIZE1 ===
=== GPUREG_CMDBUF_SIZE1 ===
| unsigned, Size of command buffer 1 >> 3
| unsigned, Size of command buffer 1 >> 3
|}
|}
This register sets the size of the second command buffer.
=== GPUREG_CMDBUF_ADDR0 ===
=== GPUREG_CMDBUF_ADDR0 ===
| unsigned, Physical address of command buffer 0 >> 3
| unsigned, Physical address of command buffer 0 >> 3
|}
|}
This register sets the physical address of the first command buffer.
=== GPUREG_CMDBUF_ADDR1 ===
=== GPUREG_CMDBUF_ADDR1 ===
| unsigned, Physical address of command buffer 1 >> 3
| unsigned, Physical address of command buffer 1 >> 3
|}
|}
This register sets the physical address of the second command buffer.
=== GPUREG_CMDBUF_JUMP0 ===
=== GPUREG_CMDBUF_JUMP0 ===
| unsigned, Trigger (0 = idle, non-zero = execute command buffer 0)
| unsigned, Trigger (0 = idle, non-zero = execute command buffer 0)
|}
|}
This register triggers a jump to the first command buffer.
=== GPUREG_CMDBUF_JUMP1 ===
=== GPUREG_CMDBUF_JUMP1 ===
| unsigned, Trigger (0 = idle, non-zero = execute command buffer 1)
| unsigned, Trigger (0 = idle, non-zero = execute command buffer 1)
|}
|}
This register triggers a jump to the second command buffer.
=== GPUREG_VSH_NUM_ATTR ===
=== GPUREG_VSH_NUM_ATTR ===
| unsigned, Number of vertex shader input attributes - 1
| unsigned, Number of vertex shader input attributes - 1
|}
|}
This register sets the number of vertex shader input attributes.
=== GPUREG_VSH_COM_MODE ===
=== GPUREG_VSH_COM_MODE ===
| 0
| 0
| unsigned, Geometry shader configuration enabled (0 = disabled, 1 = enabled)
| unsigned, Geometry shader configuration enabled (0 = disabled, 1 = enabled)
|}
|}
This register sets whether to use the geometry shader configuration or reuse the vertex shader configuration for the geometry shader shading unit.
=== GPUREG_START_DRAW_FUNC0 ===
=== GPUREG_START_DRAW_FUNC0 ===
| unsigned, Mode (0 = drawing, 1 = configuration)
| unsigned, Mode (0 = drawing, 1 = configuration)
|-
|-
| 1-31
| 1-7
| 0x0
| 0x0
|}
|}
When the mode value is set to 1, rendering is not performed properly. When set to 0, changes to the vertex shader configuration registers are not applied correctly.
This register is related to drawing. When the mode value is set to 1, rendering is not performed properly. When set to 0, changes to the vertex shader configuration registers are not applied correctly. Because of this, it is usually initialized to 1, set to 0 immediately before triggering a draw, and set back to 1 immediately after triggering a draw.
=== GPUREG_VSH_OUTMAP_TOTAL1 ===
=== GPUREG_VSH_OUTMAP_TOTAL1 ===
| unsigned, Number of vertex shader output map registers - 1
| unsigned, Number of vertex shader output map registers - 1
|}
|}
This register sets the number of vertex shader output map registers.
=== GPUREG_VSH_OUTMAP_TOTAL2 ===
=== GPUREG_VSH_OUTMAP_TOTAL2 ===
| unsigned, Number of vertex shader output map registers - 1
| unsigned, Number of vertex shader output map registers - 1
|}
|}
This register sets the number of vertex shader output map registers.
=== GPUREG_GSH_MISC0 ===
=== GPUREG_GSH_MISC0 ===
| unsigned, Misc data (0x00000001 = Reserved geometry shader subdivision in use, 0x01004302 = Particle system in use, 0 otherwise)
| unsigned, Misc data (0x00000001 = Reserved geometry shader subdivision in use, 0x01004302 = Particle system in use, 0 otherwise)
|}
|}
This register configures miscellaneous geometry shader properties.
=== GPUREG_GEOSTAGE_CONFIG2 ===
=== GPUREG_GEOSTAGE_CONFIG2 ===
|-
|-
| 0
| 0
| unsigned, Draw command active (0 = not active, 1 = active)
| unsigned, Function indicator (with vertex buffers: 0 = draw elements, 1 = draw arrays, without: 0 = not inputting, 1 = inputting vertex attribute data)
|-
|-
| 8
| 8
| unsigned, Drawing triangle elements (0 = not, 1 = drawing triangle elements)
| unsigned, Drawing triangle elements (0 = not, 1 = drawing triangle elements)
|}
|}
This register is set to 1 before draw arrays/elements calls and cleared immediately after. While set to 1, some register writes out side of the 0x200-0x254 and
This register configures the geometry stage of the GPU pipeline.
0x280-0x2DF ranges may be processed incorrectly.
When using vertex buffers, bit 0 is set to 1 before drawing arrays, and cleared to 0 immediately after. When using immediate mode to directly input vertex attribute data, bit 0 is set to 1 before inputting vertex attribute data, and cleared to 0 immediately after. While bit 0 is set to 1, some register writes outside of the 0x200-0x254 and 0x280-0x2DF ranges may be processed incorrectly.
When using vertex buffers and drawing elements in triangles mode, bit 8 is set to 1, else it is set to 0.
=== GPUREG_GSH_MISC1 ===
=== GPUREG_GSH_MISC1 ===
| unsigned, Reserved geometry shader subdivision type (2 = Loop, 3 = Catmull-Clark)
| unsigned, Reserved geometry shader subdivision type (2 = Loop, 3 = Catmull-Clark)
|}
|}
This register configures the type of reserved geometry shader subdivision in use. The value is ignored when a subdivision is not in use.
=== GPUREG_PRIMITIVE_CONFIG ===
=== GPUREG_PRIMITIVE_CONFIG ===
| 8-9
| 8-9
| unsigned, Primitive mode
| unsigned, Primitive mode
|}
|}
This register configures primitive drawing.
Primitive mode value:
Primitive mode value:
| 0x0
| 0x0
|}
|}
This register triggers resetting primitive drawing.
== Shader registers ==
== Shader registers ==