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I2C Registers (edit)

Revision as of 06:57, 8 April 2024

5,449 bytes added ,  8 April
→‎Device 3: MCU bit 11: Accelerometer status
Line 342: Line 342:  
| ro
 
| ro
 
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of them are read via [[MCU_Services|mcu::RTC]].
 
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of them are read via [[MCU_Services|mcu::RTC]].
−
   bit01: ShellState
+
   bit1: ShellState
−
   bit03: AdapterState
+
   bit3: AdapterState
−
   bit04: BatteryChargeState
+
   bit4: BatteryChargeState
−
   bit05: Bottom screen backlight on
+
   bit5: Bottom screen backlight on
−
   bit06: Top screen backlight on
+
   bit6: Top screen backlight on
−
   bit07: GPU on(?)
+
   bit7: LCD panel voltage on
 
|-
 
|-
 
| 0x10
 
| 0x10
Line 383: Line 383:  
   bit09: Charger plugged in
 
   bit09: Charger plugged in
 
   bit10: RTC alarm (when some conditions are met it's sent when the current day and month and year matches the current RTC time)
 
   bit10: RTC alarm (when some conditions are met it's sent when the current day and month and year matches the current RTC time)
−
   bit11: ??? (accelerometer related)
+
   bit11: Accelerometer I2C read/write done [https://github.com/profi200/libn3ds/blob/083c8ffa3f56a49802fa74b6afe45a96820f0439/include/arm11/drivers/mcu_regmap.h#L124]
 
   bit12: HID update
 
   bit12: HID update
 
   bit13: Battery percentage status change (triggered at 10%, 5%, and 0% while discharging)
 
   bit13: Battery percentage status change (triggered at 10%, 5%, and 0% while discharging)
Line 442: Line 442:  
| d
 
| d
 
| wo
 
| wo
−
| Used to set LCD states
+
| Used to turn on or turn off LCD-related boost circuits. Bits 5:2 can be read back so see whether backlight setting is in progress or not, however bits 1:0 get cleared as soon as the request gets acknowledged.
−
   bit0: don't push to LCDs
+
   bit0: LCD panel voltage off
−
   bit1: push to LCDs
+
   bit1: LCD panel voltage on
−
   bit2: bottom screen backlight off
+
   bit2: Bottom screen backlight off
−
   bit3: bottom screen backlight on
+
   bit3: Bottom screen backlight on
−
   bit4: top screen backlight off
+
   bit4: Top screen backlight off
−
   bit5: top screen backlight on
+
   bit5: Top screen backlight on
    
Bits 4 and 5 have no effect on a 2DS because the backlight source is the bottom screen.
 
Bits 4 and 5 have no effect on a 2DS because the backlight source is the bottom screen.
Line 834: Line 834:  
| Controller ID
 
| Controller ID
 
|  
 
|  
−
| Upper 4bits is manufacturer. Lower 4bits is unknown, most likely revision, possibly encoded as a Johnson counter.
+
| Upper 4bits is manufacturer. Lower 4bits is unknown, most likely revision, possibly encoded as a Johnson counter. The fields are encoded this way, most likely for the register checksum feature.
 +
 
 +
Manufacturers:
 +
  - 0x0 - SHARP (LTPS(?) TN), old I2CLCD, found in old3DS (non-XL) only
 +
  - 0x1 - JDI (LTPS IPS), found in select new3DS and new3DSXL consoles
 +
  - 0xC - SHARP (LTPS(?) TN), new I2CLCD
 +
  - 0xE - SHARP (TFT), found in 2DS only
    
Known IDs:
 
Known IDs:
Line 840: Line 846:  
   - 0xC3 - older old3DSXL
 
   - 0xC3 - older old3DSXL
 
   - 0xE1 - 2DS
 
   - 0xE1 - 2DS
 +
    - LQ050B1LW10B
 +
      - LQ = normal TFT
 +
      - 050 = panel 5 inches diagonal
 +
      - B = "other" display format
 +
      - 1 = transmissive (backlight-compatible)
 +
      - L = LVDS
 +
      - W = *unknown coating type*
 +
      - 10 = model number
 +
      - B = *unknown suffix*
 
   - 0x10 - some select new3DS and new3DSXL with IPS screens
 
   - 0x10 - some select new3DS and new3DSXL with IPS screens
 
   - 0x01 - old3DS
 
   - 0x01 - old3DS
−
  - 0x00 - unknown, gsp compares for this exact Controller ID for an alternate initialization path
+
    - LS035T7LE38P (top screen)
−
 
+
      - LS = TFT (LTPS or SI-TFT ?)
−
Manufacturers:
+
      - 035 = panel 3.5 inches diagonal
−
  - 0xC - SHARP (TN)
+
      - T = "other 16:9" (even though the panel is 16:10 in physical size, or 32:10 in terms of pixel count)
−
  - 0x1 - JDI (LTPS IPS), found in select new3DS and new3DSXL consoles
+
      - 7 = *unknown backing type*
−
  - 0xE - unknown, found in 2DS only
+
      - L = LVDS
−
   - 0x0 - unknown, found in old3DS (non-XL) only
+
      - E = *unknown coating type*
 +
      - 38 = model number
 +
      - P = *unknow suffix*
 +
    - LS030Q7DW48P (bottom screen)
 +
      - LS = TFT (LTPS or SI-TFT ?)
 +
      - 030 = panel 3 inches diagonal
 +
      - Q = QVGA (320x240)
 +
      - 7 = *unknown backing type*
 +
      - D = parallel RGB (unspecified, but it's known to be RGB888 for this display)
 +
      - W = *unknown coating type*
 +
      - 48 = model number
 +
      - P = *unknow suffix*
 +
   - 0x00 - no controller, or dead (I2CLCD always ACKs reads, but returns 00 if dead)
 
|}
 
|}
   Line 870: Line 897:  
| Unknown. Write 0x01 to initialize.
 
| Unknown. Write 0x01 to initialize.
 
|}
 
|}
 +
    
=== Custom registers for controller 0x01 ===
 
=== Custom registers for controller 0x01 ===
Line 883: Line 911:  
| 0xF7
 
| 0xF7
 
| Regonfigures the input pins and pin behavior of the controller.
 
| Regonfigures the input pins and pin behavior of the controller.
 +
 +
bit0 - color value invert (D = ~D, or D = 255 - D)
 +
bit1 - color format remap (D7:D2 <-- D5:D0, that is left shift color data by 2)
 +
bit2 - ???
 +
bit4 - ???
 +
bit5 - ???
 +
bit6 - ???
 +
bit7 - DS-style undriven screen (it will be white instead of black, see shared register 0x01)
 
|-
 
|-
 
| 0x11
 
| 0x11
Line 888: Line 924:  
| 0x7F
 
| 0x7F
 
| Image filters and pixel clock control.
 
| Image filters and pixel clock control.
 +
 +
bit0 - Horizontal Flip (scan from right to left)
 +
bit1 - red-blue swap
 +
bit2 - ???
 +
bit3 - ???
 +
bit4 - ???
 +
bit5 - ???
 +
bit6 - ???
 +
|-
 +
| 0x1D
 +
| ???
 +
| 0x0F
 +
| Unknown, bit0 enables registers 0x12 to 0x19 to control some analog timing controls to the display panel itself.
 
|-
 
|-
 
| 0x50
 
| 0x50
Line 902: Line 951:  
=== Custom registers for controller 0xC3 ===
 
=== Custom registers for controller 0xC3 ===
 
Basically the same as Controller ID 0xC7.
 
Basically the same as Controller ID 0xC7.
 +
    
=== Custom registers for controller 0xC7 ===
 
=== Custom registers for controller 0xC7 ===
 
This is the most common non-old3DS display controller. Quite overclockable.
 
This is the most common non-old3DS display controller. Quite overclockable.
 +
 +
Note: on the 0xC7 controller unlocking the factory controls at register 0x03 glitches out most of the standard controls (like registers 0x50 to 0x56), so use with caution.
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 911: Line 963:  
!  Valid bits
 
!  Valid bits
 
!  Description
 
!  Description
 +
|-
 +
| 0x03
 +
| Factory key 2
 +
|
 +
| Write 0xAA here to unlock a second set of factory controls.
 
|-
 
|-
 
| 0xAF
 
| 0xAF
Line 916: Line 973:  
|  
 
|  
 
| Write 0xAA here to unlock factory controls.
 
| Write 0xAA here to unlock factory controls.
 +
|}
 +
 +
Factory mode registers for unlock register 0x03:
 +
{| class="wikitable" border="1"
 +
!  Register
 +
!  Name
 +
!  Valid bits
 +
!  Description
 +
|-
 +
| 0x10
 +
| Image control?
 +
| 0xD7
 +
| Most bits are unknown.
 +
 +
bit0 - color invert
 +
bit1 - slight gamma increase
 +
|-
 +
| 0x11
 +
| Image transform?
 +
| 0x7F
 +
| Mostly unknown.
 +
bit0 - Invert horizontal scan direction (0 = left to right, 1 = right to left)
 +
bit1 - red-blue swap
 +
bit2 - Invert vertical scan direction (0 = top to bottom, 1 = bottom to top)
 +
bit3 - Invert the order of each scanline pair (might be needed if bit2 is toggled)
 +
bit4 - Enable interlaced signal (use bit3 to swap fields)
 +
bit5 - ???
 +
bit6 - ???
 +
|-
 +
| 0x70-0x83
 +
| Color curve red
 +
| rowspan=3 |
 +
| rowspan=3 | These registers are used for fine-tuning the analog driving curve of the screen
 +
 +
Positive:
 +
- byte 00 (0xFF) - ???
 +
- byte 01 (0xFF) - ???
 +
- byte 02 (0x3F) - ???
 +
- byte 03 (0x3F) - ???
 +
- byte 04 (0x3F) - ???
 +
- byte 05 (0x3F) - ???
 +
- byte 06 (0x3F) - ???
 +
- byte 07 (0x3F) - ???
 +
- byte 08 (0x3F) - ???
 +
- byte 09 (0x3F) - ???
 +
 +
Negative:
 +
- byte 10 (0xFF) - ???
 +
- byte 11 (0xFF) - ???
 +
- byte 12 (0x3F) - ???
 +
- byte 13 (0x3F) - ???
 +
- byte 14 (0x3F) - ???
 +
- byte 15 (0x3F) - ???
 +
- byte 16 (0x3F) - ???
 +
- byte 17 (0x3F) - ???
 +
- byte 18 (0x3F) - ???
 +
- byte 19 (0x3F) - ???
 +
|-
 +
| 0x84-0x97
 +
| Color curve green
 +
|-
 +
| 0x98-0xAB
 +
| Color curve blue
 
|}
 
|}
   Line 922: Line 1,042:     
This is the only I2CLCD which responds on both I2CLCD addresses. The dominant screen is the bottom one.
 
This is the only I2CLCD which responds on both I2CLCD addresses. The dominant screen is the bottom one.
 +
 +
Most registers are similar to controller 0xC7, but there are some differences due to the split shared panel nature.
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
Line 928: Line 1,050:  
!  Valid bits
 
!  Valid bits
 
!  Description
 
!  Description
 +
|-
 +
| 0x03
 +
| Factory key 2
 +
|
 +
| Write 0xAA here to unlock a 2nd set of factory controls.
 
|-
 
|-
 
| 0xAF
 
| 0xAF
Line 933: Line 1,060:  
|  
 
|  
 
| Write 0xAA here to unlock factory controls.
 
| Write 0xAA here to unlock factory controls.
 +
|}
 +
 +
Factory mode registers for unlock register 0x03:
 +
{| class="wikitable" border="1"
 +
!  Register
 +
!  Name
 +
!  Valid bits
 +
!  Description
 +
|-
 +
| 0x10
 +
| Image control?
 +
| 0xD7
 +
| Most bits are unknown. This applies to the whole display panel.
 +
 +
bit0 - color invert
 +
bit1 - slight gamma increase
 +
|-
 +
| 0x11
 +
| Image transform
 +
| 0x33
 +
|
 +
bit0 - top half horizontal flip
 +
bit1 - top half red-blue swap
 +
bit4 - bottom half horizontal flip
 +
bit5 - bottom half red-blue swap
 +
|-
 +
| 0x70-0x83
 +
| Analog curve top
 +
| rowspan=2 |
 +
| rowspan=2 | Consists of two unknown curve values. Seems to be nonstandard.
 +
 +
Pair 1:
 +
byte 00 (0xFF) - ???
 +
byte 01 (0xFF) - ???
 +
byte 02 (0xFF) - ???
 +
byte 03 (0xFF) - ???
 +
byte 04 (0x3F) - ???
 +
byte 05 (0x3F) - ???
 +
byte 06 (0x3F) - ???
 +
byte 07 (0x3F) - ???
 +
byte 08 (0x3F) - ???
 +
byte 09 (0x3F) - ???
 +
 +
Part 2:
 +
byte 10 (0xFF) - ???
 +
byte 11 (0xFF) - ???
 +
byte 12 (0xFF) - ???
 +
byte 13 (0xFF) - ???
 +
byte 14 (0x3F) - ???
 +
byte 15 (0x3F) - ???
 +
byte 16 (0x3F) - ???
 +
byte 17 (0x3F) - ???
 +
byte 18 (0x3F) - ???
 +
byte 19 (0x3F) - ???
 +
|-
 +
| 0x84-0x97
 +
| Analog curve bottom
 
|}
 
|}
    
=== Custom registers for controller 0x10 ===
 
=== Custom registers for controller 0x10 ===
−
JDI IPS controller. It's currently unknown how to unlock factory registers.
+
JDI IPS controller.
 +
 
 +
Warning: on the JDI controller, unlocking any of the factory mode registers overshadows some other registers, so don't write to "standard" locations (other than register 0x40) before locking factory mode back!
 +
 
 +
{| class="wikitable" border="1"
 +
!  Register
 +
!  Name
 +
!  Valid bits
 +
!  Description
 +
|-
 +
| 0x03
 +
| Factory key 2
 +
|
 +
| Write 0xAA here to unlock advanced IPS curve controls.
 +
|-
 +
| 0xAF
 +
| Factory key
 +
|
 +
| Write 0xAA here to unlock factory controls.
 +
|}
 +
 
 +
Factory mode registers unlocked by register 0xAF:
 +
* 0x41 - 0x4F
 +
* 0x58 - 0x5F
 +
* 0x67 - 0x6F
 +
* 0xD0 - 0xEF
 +
* unknown...
   −
Factory mode registers:
+
Factory mode registers unlocked by register 0x03:
 +
* 0x04 - 0x0F
 +
* unknown...
 
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
!  Register
 
!  Register
Retrieved from "https://www.3dbrew.org/wiki/Special:MobileDiff/22378...22538"

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