510
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→Device 3
| System power control:
bit0: power off
bit1: full reboot (unused?). Discards things like [[CONFIG9_Registers#CFG9_BOOTENV|CFG9_BOOTENV]] bit2: reboot (used by mcu sysmodule and LgyBg). Preserves [[CONFIG9_Registers#CFG9_BOOTENV|CFG9_BOOTENV]], etc. bit3: used reset FCRAM (present in by LgyBg to power off, causes hangs in 3DS-mode. Unused because a system reboot does the same thing & a PDN reg also implements this function. bit4: used by PTM to signal that sleep mode is about to be entered(used by PTM)
Bit 4 sets a bit at a RAM address which seems to control the watcdog timer state, then this bit is immediately unmasked. This field has a bitmask of 0x0F.
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| d
| wo
| Writing 0x72 ('r') resets the MCU, writing 0x77 ('w') resets its WDT. Seems to require special conditions, or doesn't work but this is stubbed on current unitsretail?
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| 0x24
