Line 277:
Line 277:
bit0: RTC clock value got reset to defaults
bit0: RTC clock value got reset to defaults
bit1: Watchdog reset happened
bit1: Watchdog reset happened
−
bit5: TWL volume mode (0: 8-step, 1: 32-step)
+
bit5: TWL MCU reg: volume mode (0: 8-step, 1: 32-step)
−
bit6: Is in TWL mode
+
bit6: TWL MCU reg: NTR (0) vs TWL mode (1)
+
bit7: TWL MCU reg: Uses NAND
|-
|-
| 0x03
| 0x03