LCD Registers: Difference between revisions

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== Registers ==
Other registers that used to be documented on this page are now at [[GPU Registers]].
 
= Registers =
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  NAME
!  NAME
Line 7: Line 9:
!  WIDTH
!  WIDTH
|-
|-
| REG_LCDCOLORFILLMAIN
| Parallax barrier enable
| 0x10202204
| 0x10202000
| 0x1ED02204
| 0x1ED02000
| 0xFFFD6204
| 0xFFFD6000
| 4
| 0x4
|-
|-
| REG_LCDCOLORFILLSUB
| Parallax barrier PWM
| 0x10202A04
| 0x10202004
| 0x1ED02A04
| 0x1ED02004
| 0xFFFD6A04
| 0xFFFD6004
| 4
| 0x4
|}
 
REG_*MAIN registers are used for the top LCD, while SUB is used for the bottom LCD. The registers for the main LCD is located at 0x1EF00400, while the sub LCD registers are located at 0x1EF00500.
 
== REG_LCDCOLORFILL ==
{| class="wikitable" border="1"
!  Bit
!  Description
|-
|-
| 7-0
| LCD status
| Red component intensity
| 0x10202008
| 0x1ED02008
| 0xFFFD6008
| 0x4
|-
|-
| 15-8
| LCD clock disable
| Green component intensity
| 0x1020200C
| 0x1ED0200C
| 0xFFFD600C
| 0x4
|-
|-
| 23-16
| ?
| Blue component intensity
| 0x10202010
| 0x1ED02010
| 0xFFFD6010
| 0x4
|-
|-
| 24
| LCD reset
| Enable
| 0x10202014
| 0x1ED02014
| 0xFFFD6014
| 0x4
|-
|-
| 31-25
| Top Screen [[#LCD Configuration|LCD Configuration]]
| ?
| 0x10202200
|}
| 0x1ED02200
When the enable bit is set, the specified solid color is displayed on the LCD instead of the framebuffer.
| 0xFFFD6200
 
| 0x600
== 0x1EF00X5C ==
{| class="wikitable" border="1"
!  Bit
!  Description
|-
|-
| 15-0
| Bottom Screen [[#LCD Configuration|LCD Configuration]]
| Framebuffer width
| 0x10202A00
| 0x1ED02A00
| 0xFFFD6A00
| 0x600
|-
|-
| 31-16
| ?
| Framebuffer height
| 0x10203200
| 0x1ED03200
| 0xFFFD7200
| 0x40
|}
|}


This controls the displayed LCD framebuffer dimensions.
On screen-init (error screen), Boot11 sets 0x10202004 to 0xA390A39.


== 0x1EF00X70 ==
== LCD Configuration ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  Bit
!  Offset
!  Size
!  Description
!  Description
|-
|-
| 15-0
| 0x00
| Framebuffer format
| 0x4
| [[#Flags|Flags]]
|-
| 0x04
| 0x4
| [[#Fill Color|Fill Color]]
|-
|-
| 31-16
| 0x10
| ?
| 0x10
|}
| [[#ABL Area|ABL Area]]
 
=== Framebuffer format ===
{| class="wikitable" border="1"
|-
|-
!  Bit
| 0x20
!  Description
| 0x4
| GTH Ratio
|-
|-
| 3-0
| 0x24
| Color format
| 0x4
| Min GTH
|-
|-
| 4
| 0x28
| Unused?
| 0x4
| MinMax
|-
|-
| 5
| 0x2C
| Set when the main screen 3D right framebuffer address is set.
| 0x4
| ExMax
|-
|-
| 6
| 0x30
| 1 = main screen, 0 = sub screen. However if bit5 is set, this bit is cleared.
| 0x4
| Inertia
|-
|-
| 7
| 0x38
| ?
| 0x4
| MinRS
|-
|-
| 9-8
| 0x3C
| Value 1 = unknown, 3 = unknown.
| 0x4
| MaxRS
|-
|-
| 15-10
| 0x40
| Unused?
| 0x4
|}
| [[#Backlight Level|Backlight Level]]
 
GSP module only allows the LCD stereoscopy to enabled when bit5=1 and bit6=0 here. When GSP module updates this register, GSP module will automatically disable the stereoscopy if those bits are not set for enabling stereoscopy.
 
=== Framebuffer color formats ===
{| class="wikitable" border="1"
|-
|-
!  Value
| 0x44
!  Description
| 0x4
| [[#Backlight Interval|Backlight Interval]]
|-
|-
| 0
| 0x60
| GL_RGBA8_OES
| 0x20
| Dither
|-
|-
| 1
| 0x80
| GL_RGB8_OES
| 0x24
| LutListRS
|-
|-
| 2
| 0xF0
| GL_RGB565_OES
| 0x0C
| ?
|-
|-
| 3
| 0x100
| GL_RGB5_A1_OES
| 0x100
| LCD calibration data, pulled from nand:/ro/sys/HWCAL0.dat offset 0x77C.
N3DS only. This area on old3DS is zero-filled and not writable.
|-
|-
| 4
| 0x200
| GL_RGBA4_OES
| 0x400
| ?
|}
|}


== 0x1EF00X78 ==
=== Flags ===
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Bit
! Bit
! Description
! Description
|-
|-
| 0
| 0
| LCD framebuffer to display (0=first, 1=second)
| ABL on
|-
|-
| 7-1
| 8
| ?
| ?
|-
|-
| 31-8
| 9
| Unused
| ?
|}
|}


== 0x1EF00X90 ==
Bits 8 and 9 control dither.
 
=== Fill Color ===
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  Bit
!  Bit
!  Description
!  Description
|-
|-
| 31-0
| 7-0
| Framebuffer width * pixel byte-size.
| Red component intensity
|-
| 15-8
| Green component intensity
|-
| 23-16
| Blue component intensity
|-
| 24
| Enable
|}
|}


== Framebuffers ==
When the enable bit is set, the specified solid color is displayed on the LCD instead of the framebuffer.
 
=== ABL Area ===
{| class="wikitable" border="1"
{| class="wikitable" border="1"
!  Address
!  Offset
!  Description
!  Description
|-
|-
| 0x1EF00468
| 0x00
| Main LCD, first framebuffer for 3D left
| X begin
|-
|-
| 0x1EF0046C
| 0x04
| Main LCD, second framebuffer for 3D left
| X end
|-
|-
| 0x1EF00494
| 0x08
| Main LCD, first framebuffer for 3D right
| Y begin
|-
| 0x0C
| Y end
|}
 
The values refer to 90° clockwise rotated screens.
 
=== Backlight Level ===
{| class="wikitable" border="1"
!  Bit
!  Description
|-
|-
| 0x1EF00498
| 9-0
| Main LCD, second framebuffer for 3D right
| Backlight PWM duty on (0 = off)
|}
 
=== Backlight Interval ===
{| class="wikitable" border="1"
!  Bit
!  Description
|-
|-
| 0x1EF00568
| 9-0
| Sub LCD, first framebuffer
| Backlight PWM Interval, minus 1
|-
|-
| 0x1EF0056C
| 16
| Sub LCD, second framebuffer
| Enable LCD (0 = disabled, 1 = enabled).
|-
|-
| 0x1EF00594
| 17
| Sub LCD, unused first framebuffer
| RS on (?)
|-
|-
| 0x1EF00598
| 18
| Sub LCD, unused second framebuffer
| ?
|}
|}


The above framebuffer registers contains the physical address for each framebuffer, normally located in FCRAM in the application's GSP heap. When other processes use GSP as well, the framebuffers for the process is stored in VRAM instead.
On old 2DS, disabling the top LCD does nothing, disabling the bottom LCD affects both screens.
 
Setting bit 18 makes the screen darker.
These LCD framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
 
Both of the 3D screen left/right framebuffers are displayed regardless of the 3D slider's state, however when the 3D slider is set to "off" the 3D effect is disabled. Normally when the 3D slider's state is set to "off" the left/right framebuffer addresses are set to the same physical address. When the 3D effect is disabled and the left/right framebuffers are set to separate addresses, the LCD seems to alternate between displaying the left/right framebuffer each frame.

Latest revision as of 15:12, 24 October 2023

Other registers that used to be documented on this page are now at GPU Registers.

Registers

NAME PHYSICAL ADDRESS PROCESS VIRTUAL ADDRESS KERNEL VIRTUAL ADDRESS WIDTH
Parallax barrier enable 0x10202000 0x1ED02000 0xFFFD6000 0x4
Parallax barrier PWM 0x10202004 0x1ED02004 0xFFFD6004 0x4
LCD status 0x10202008 0x1ED02008 0xFFFD6008 0x4
LCD clock disable 0x1020200C 0x1ED0200C 0xFFFD600C 0x4
? 0x10202010 0x1ED02010 0xFFFD6010 0x4
LCD reset 0x10202014 0x1ED02014 0xFFFD6014 0x4
Top Screen LCD Configuration 0x10202200 0x1ED02200 0xFFFD6200 0x600
Bottom Screen LCD Configuration 0x10202A00 0x1ED02A00 0xFFFD6A00 0x600
? 0x10203200 0x1ED03200 0xFFFD7200 0x40

On screen-init (error screen), Boot11 sets 0x10202004 to 0xA390A39.

LCD Configuration

Offset Size Description
0x00 0x4 Flags
0x04 0x4 Fill Color
0x10 0x10 ABL Area
0x20 0x4 GTH Ratio
0x24 0x4 Min GTH
0x28 0x4 MinMax
0x2C 0x4 ExMax
0x30 0x4 Inertia
0x38 0x4 MinRS
0x3C 0x4 MaxRS
0x40 0x4 Backlight Level
0x44 0x4 Backlight Interval
0x60 0x20 Dither
0x80 0x24 LutListRS
0xF0 0x0C ?
0x100 0x100 LCD calibration data, pulled from nand:/ro/sys/HWCAL0.dat offset 0x77C.

N3DS only. This area on old3DS is zero-filled and not writable.

0x200 0x400 ?

Flags

Bit Description
0 ABL on
8 ?
9 ?

Bits 8 and 9 control dither.

Fill Color

Bit Description
7-0 Red component intensity
15-8 Green component intensity
23-16 Blue component intensity
24 Enable

When the enable bit is set, the specified solid color is displayed on the LCD instead of the framebuffer.

ABL Area

Offset Description
0x00 X begin
0x04 X end
0x08 Y begin
0x0C Y end

The values refer to 90° clockwise rotated screens.

Backlight Level

Bit Description
9-0 Backlight PWM duty on (0 = off)

Backlight Interval

Bit Description
9-0 Backlight PWM Interval, minus 1
16 Enable LCD (0 = disabled, 1 = enabled).
17 RS on (?)
18 ?

On old 2DS, disabling the top LCD does nothing, disabling the bottom LCD affects both screens. Setting bit 18 makes the screen darker.

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