PDN Registers: Difference between revisions
Legacy regs |
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Line 38: | Line 38: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| [[# | | [[#LGY_IRQ_ENABLE|LGY_IRQ_ENABLE]] | ||
| 0x10141108 | | 0x10141108 | ||
| 2 | | 2 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| [[# | | [[#LGY_HIDEMU_MASK|LGY_HIDEMU_MASK]] | ||
| 0x10141110 | | 0x10141110 | ||
| 2 | | 2 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| [[# | | [[#LGY_HIDEMU_PAD|LGY_HIDEMU_PAD]] | ||
| 0x10141112 | | 0x10141112 | ||
| 2 | | 2 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| [[# | | [[#LGY_GPIOEMU_MASK|LGY_GPIOEMU_MASK]] | ||
| 0x10141114 | | 0x10141114 | ||
| 2 | | 2 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| [[# | | [[#LGY_GPIOEMU_DATA|LGY_GPIOEMU_DATA]] | ||
| 0x10141116 | | 0x10141116 | ||
| 2 | | 2 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#LGY_CARDDETECTEMU_MASK|LGY_CARDDETECTEMU_MASK]] | ||
| 0x10141118 | | 0x10141118 | ||
| 1 | | 1 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| | | [[#LGY_CARDDETECTEMU_DATA|LGY_CARDDETECTEMU_DATA]] | ||
| 0x10141119 | | 0x10141119 | ||
| 1 | | 1 | ||
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|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| ? | | LGY_? | ||
| 0x10141120 | | 0x10141120 | ||
| 1 | | 1 | ||
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When a GBA game enters sleep mode and bit 15 is 1, IRQ 0x59 fires and bit 1 is set. Bit 1 must be acknowledged/written together with bit 0 otherwise GBA mode wakes up from sleep early sometimes. | When a GBA game enters sleep mode and bit 15 is 1, IRQ 0x59 fires and bit 1 is set. Bit 1 must be acknowledged/written together with bit 0 otherwise GBA mode wakes up from sleep early sometimes. | ||
== | ==LGY_IRQ_ENABLE== | ||
[[ARM11_Interrupts|Arm11 interrupt]] enable bits for legacy interrupts, same bit layout as the GPIOEMU regs below. | |||
==LGY_PADCNT== | ==LGY_PADCNT== | ||
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|} | |} | ||
== | ==LGY_HIDEMU_MASK== | ||
Set bits will use the corresponding values from [[# | Set bits will use the corresponding values from [[#LGY_HIDEMU_PAD|LGY_HIDEMU_PAD]] instead of allowing the hardware to read it from [[HID_Registers#HID_PAD|HID_PAD]]. | ||
This is set to 0x1FFF (all buttons and the debug key) and [[#LGY_HIDEMU_PAD|LGY_HIDEMU_PAD]] is set to 0 when the "Close this software and return to HOME Menu?" dialog is shown to prevent the button presses from propagating to the DS/GBA CPU. | |||
==LGY_HIDEMU_PAD== | |||
Works the same way as [[HID_Registers#HID_PAD|HID_PAD]], but the values set here are only replaced in the HID_PAD seen by the DS/GBA CPU when the corresponding bits in [[#LGY_HIDEMU_MASK|LGY_HIDEMU_MASK]] are set. | |||
==LGY_GPIOEMU_MASK== | |||
Set bits will read bits from [[#LGY_GPIOEMU_DATA|LGY_GPIOEMU_DATA]] (override). | |||
This is used to trigger things like the TWL MCU interrupt in TWL mode. | |||
==LGY_GPIOEMU_DATA== | |||
See above | |||
==LGY_CARDDETECTEMU_MASK== | |||
Set bits will read bits from [[#LGY_CARDDETECTEMU_DATA|LGY_CARDDETECTEMU_DATA]] (override). | |||
Bit0 signals cartridge removal. | |||
== | ==LGY_CARDDETECTEMU_DATA== | ||
See above | |||
==PDN_GPU_CNT== | ==PDN_GPU_CNT== | ||
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Kernel11 uses it before going to sleep. It does a dummy read before touching this reg. | Kernel11 uses it before going to sleep. It does a dummy read before touching this reg. | ||
==PDN_CAMERA_CNT== | ==PDN_CAMERA_CNT== |