PDN Registers: Difference between revisions
| Line 387: | Line 387: | ||
| SoC mode. | | SoC mode. | ||
Possible values: | Possible values: | ||
0= | 0=CTR+256MHz | ||
1=LGR2+256MHz, 5=LGR2+804MHz | 1=LGR2+256MHz, 5=LGR2+804MHz | ||
2=LGR+256MHz, 3=LGR+536MHz | 2=LGR+256MHz, 3=LGR+536MHz | ||
| Line 393: | Line 393: | ||
N3DS modes (LGR1/LGR2) enable the New 3DS FCRAM extension and are needed to access N3DS-only devices. | N3DS modes (LGR1/LGR2) enable the New 3DS FCRAM extension and are needed to access N3DS-only devices. | ||
* CTR: O3DSS | |||
* LGR1: N3DS prototype, 2 cores, no L2C | * LGR1: N3DS prototype, 2 cores, no L2C | ||
* LGR2: retail N3DS, 4 cores, has L2C | * LGR2: retail N3DS, 4 cores, has L2C | ||