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- 20:03, 26 September 2024 diff hist +403 I2S Registers current
- 00:09, 15 February 2021 diff hist +36 m SPI Registers →NSPI_FIFO current
- 00:08, 15 February 2021 diff hist +37 m SPICARD Registers →NSPI_FIFO current
- 02:13, 13 February 2021 diff hist +52 m Gamecards →SPI flash: Clock polarity and phase.
- 13:51, 29 January 2021 diff hist +180 Corelink DMA Engines →XDMA Peripheral IDs current
- 14:29, 28 May 2020 diff hist +12 m CONFIG9 Registers →CFG9_SDMMCCTL: Oops
- 23:33, 27 May 2020 diff hist 0 m CONFIG11 Registers →LGY_MODE: Oops.
- 23:25, 27 May 2020 diff hist -46 m IO Registers →Overview
- 23:18, 27 May 2020 diff hist +325 CONFIG9 Registers →CFG9_SDMMCCTL: ARM11 SD card access hype.
- 14:53, 7 May 2020 diff hist +18 m GPU/External Registers →LCD Source Framebuffer Setup: Forgot to mention which screen.
- 14:52, 7 May 2020 diff hist -41 m GPU/External Registers →LCD Source Framebuffer Setup: Oops.
- 14:51, 7 May 2020 diff hist +39 m GPU/External Registers →LCD Source Framebuffer Setup: PAL emulator hype.
- 14:39, 7 May 2020 diff hist +5 m CONFIG11 Registers →LGY_PADCNT: Broken link.
- 14:35, 7 May 2020 diff hist +389 GPU/External Registers →LCD Source Framebuffer Setup
- 15:34, 25 April 2020 diff hist +352 HID Registers
- 15:20, 25 April 2020 diff hist +1 m CONFIG11 Registers →LGY_PADCNT: Come on.
- 15:19, 25 April 2020 diff hist -4 m CONFIG11 Registers →LGY_MODE
- 15:18, 25 April 2020 diff hist +62 m CONFIG11 Registers →LGY_PADCNT
- 15:14, 25 April 2020 diff hist +902 CONFIG11 Registers Some juicy legacy mode details.
- 15:38, 26 November 2019 diff hist +1 m I2S Registers
- 15:37, 26 November 2019 diff hist +713 I2S Registers
- 00:45, 28 June 2019 diff hist +39 m SPI Registers →Registers
- 00:42, 28 June 2019 diff hist +33 m SPICARD Registers →Registers
- 21:11, 27 June 2019 diff hist +50 m ARM11 Interrupts →Hardware Interrupts
- 00:26, 9 June 2019 diff hist +67 m CONFIG11 Registers →CFG11_GPU_CNT
- 20:46, 15 May 2019 diff hist +181 m NDMA Registers →Startup modes (27-24)
- 19:44, 15 May 2019 diff hist +164 m SHA Registers →SHA_CNT current
- 14:17, 15 May 2019 diff hist +37 m RSA Registers →RSA_CNT
- 21:52, 11 May 2019 diff hist +11 m SPI Registers →NSPI_AUTOPOLL
- 21:45, 11 May 2019 diff hist 0 m ARM11 Interrupts →Hardware Interrupts: Oops
- 21:43, 11 May 2019 diff hist +37 m ARM11 Interrupts →Hardware Interrupts
- 21:41, 11 May 2019 diff hist +1,292 SPI Registers →Registers
- 19:51, 9 May 2019 diff hist 0 m SPICARD Registers →Registers: Bit range consistency.
- 19:49, 9 May 2019 diff hist +20 m SPICARD Registers →NSPI_BLKLEN
- 16:23, 9 May 2019 diff hist +1,198 SPICARD Registers →Registers: Added missing registers.
- 01:05, 8 May 2019 diff hist +136 m SPICARD Registers →REG_SPICARDCNT
- 19:36, 7 May 2019 diff hist -104 SPI Registers →Registers: Use same naming scheme as NDMA
- 19:25, 7 May 2019 diff hist +24 m SPI Registers →SPI_NEW_CNT
- 18:37, 7 May 2019 diff hist +906 SPI Registers →Registers
- 17:03, 7 May 2019 diff hist 0 m CONFIG11 Registers →Registers
- 17:01, 7 May 2019 diff hist +33 m CONFIG9 Registers →CFG9_CARDCTL
- 17:12, 28 April 2019 diff hist -1 m I2C Registers →Device 3
- 20:54, 20 April 2019 diff hist +60 m SPI Registers →SPI_NEW_STATUS
- 20:52, 20 April 2019 diff hist +90 m SPI Registers →SPI_NEW_DONE
- 20:48, 20 April 2019 diff hist +12 m SPI Registers →SPI_NEW_CNT
- 15:47, 20 April 2019 diff hist +27 m ARM11 Interrupts →Hardware Interrupts
- 19:10, 29 May 2018 diff hist +53 m CONFIG9 Registers →CFG9_SDMMCCTL
- 18:40, 29 May 2018 diff hist -3 m CONFIG9 Registers
- 19:02, 28 May 2018 diff hist +15 m CONFIG9 Registers →CFG9_SDSLOTCTL
- 17:25, 28 May 2018 diff hist +13 m CONFIG9 Registers →CFG9_SDSLOTCTL