Difference between revisions of "LCD Registers"

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(Extra bundle of registers and that seems to be it)
Line 32: Line 32:
 
| 0xFFFD6A00
 
| 0xFFFD6A00
 
| 0x600
 
| 0x600
 +
|-
 +
| ?
 +
| 0x10203200
 +
| 0x1ED03200
 +
| 0xFFFD7200
 +
| 0x40
 
|}
 
|}
  

Revision as of 02:41, 28 February 2016

Other registers that used to be documented on this page are now at GPU Registers.

Registers

NAME PHYSICAL ADDRESS PROCESS VIRTUAL ADDRESS KERNEL VIRTUAL ADDRESS WIDTH
Parallax barrier enable 0x10202000 0x1ED02000 0xFFFD6000 0x4
? 0x10202004 0x1ED02004 0xFFFD6004 0x4
Top Screen LCD Configuration 0x10202200 0x1ED02200 0xFFFD6200 0x600
Bottom Screen LCD Configuration 0x10202A00 0x1ED02A00 0xFFFD6A00 0x600
? 0x10203200 0x1ED03200 0xFFFD7200 0x40

LCD Configuration

Offset Size Description
0x00 0x4 ?
0x04 0x4 Fill Color
0x10 0x4 ?
0x14 0x4 ?
0x18 0x4 ?
0x1C 0x4 ?
0x20 0x4 ?
0x24 0x4 ?
0x28 0x4 ?
0x2C 0x4 ?
0x30 0x4 ?
0x38 0x4 ?
0x3C 0x4 ?
0x40 0x4 Backlight
0x44 0x4 ?
0x60 0x4 ?
0x68 0x4 ?
0x70 0x4 ?
0x78 0x4 ?
0x80 0x4 ?
0x100 0x100 LCD calibration data, pulled from nand:/ro/sys/HWCAL0.dat offset 0x77C. N3DS only(?)

Fill Color

Bit Description
7-0 Red component intensity
15-8 Green component intensity
23-16 Blue component intensity
24 Enable
31-25 ?

When the enable bit is set, the specified solid color is displayed on the LCD instead of the framebuffer.