Bootloader: Difference between revisions

← Older edit

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 == BootROM Errors ==
+Here is the format of the numbers displayed on the error screen:
+  BOOTROM 8046
+  ERRCODE: ffWWGGNN
+  p3p2p1p0 p7p6p5p4
+  sd_softE sd_hardE
+* <code>ff</code>: sleep switch state (2==MCU sleep switch closed, 1==GPIO sleep switch closed (very bad if this happens), 0==sleep switch open)
+* <code>WW</code>: NVRAM (WiFi Flash) FIRM load error code
+* <code>GG</code>: ntrboot FIRM load error code
+* <code>NN</code>: NAND header (NCSD) load error code
+* <code>p<N></code>: NAND FIRM partition load error code. Note the order of the partitions in the error code!
+* <code>sd_softE</code>: software error (SD driver status bits, see one section lower)
+* <code>sd_hardE</code>: hardware error (SD device status bits, see one section lower)
 Sample error-screen(where firm0+firm1 RSA signatures were corrupted):
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 * 4th line is: <code>print_string(..., "%08X %08X",*((unsigned int*)(0x1FFFE000+0x18))`, `*((unsigned int*)(0x1fffe000+0x1C)));//See below memory notes.</code>
-== 0x1FFFE000 memory ==
+=== 0x1FFFE000 memory ===
 This memory is used by boot9 mainly for sending info to the arm11 for the error-screen. The data in this region is still stored in memory by the time the ARM9+ARM11 jumps to FIRM.
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 * u32 0x1FFFE000+4: ARM11 MPCore "Count Register 0 (PMN0)".
 * u32 0x1FFFE000+8: ARM11 MPCore "Count Register 1 (PMN0)".
-* 8bit-entry-array 0x1FFFE000+0xC: 8bit status-codes initialized by boot9 main(), for the FIRM-boot devices. +0 is NAND, +1 is NTRCARD and +2 is wifi-spiflash.
+* s8[4] 0x1FFFE000+0xC: 8bit status-codes initialized by boot9 main(), for the FIRM-boot devices. +0 is NAND, +1 is NTRCARD and +2 is WiFi Flash, +3 is sleep sensor state.
-* ...
+* s8[8] 0x1FFFE000+0x10: Status-codes originally from nand_findfirmpartition_loadfirm(), for each of the 8 NCSD partitions.
-* 8bit-entry-array 0x1FFFE000+0x10: Status-codes originally from nand_findfirmpartition_loadfirm(), for each of the 8 NCSD partitions.
+* u32 0x1FFFE000+0x18: SD driver internal error bitfield
+* u32 0x1FFFE000+0x1C: R1 status bits received from the SD device, AND-ed with 0xFDFF0080 if eMMC (NAND), otherwise 0xFDF90008 if SD.
+=== BootROM SD driver error bits ===
+{| class="wikitable" border="1"
+|-
+!  Value
+!  Description
+|-
+| 0x1
+| STATUS2: received cmd field does not match what was sent
+|-
+| 0x2
+| STATUS2: received CRC does not match what was calculated
+|-
+| 0x4
+| STATUS2: framing error, stop bit was not encountered
+|-
+| 0x8
+| STATUS2: data was not received within the timeout period
+|-
+| 0x10
+| STATUS2: RX FIFO overflow
+|-
+| 0x20
+| STATUS2: TX FIFO overflow
+|-
+| 0x40
+| STATUS2 (bit31): illegal access error (???)
+|-
+| 0x80
+| At least one error bit was set in the command reply from the SD device, or other unexpected state is reported.
+|-
+| 0x100
+| An illegal command was received by the SD device (ILLEGAL_COMMAND bit set).
+|-
+| 0x200
+| Timer-based timeout while waiting for SD device operations to finish.
+|-
+| 0x400
+| Got a timer-based timeout during MMC initialization sequence.
+|-
+| 0x800
+| ??? some sort of timeout
+|-
+| 0x8000
+| Timeout while trying to perform AES operation on sector data
+|-
+| 0x80000
+| Tried to perform AES operation while another AES operation is taking place
+|}
+=== BootROM SD device error bits ===
+These error codes are received directly from the device, and are in the same format as received in an R1 type reply.
+See [https://www.sdcard.org/downloads/pls/ SD Specifications Part 1 Physical Layer Simplified Specification] for the error bit list.
-== BootROM Status Codes ==
+=== BootROM Status Codes ===
 {| class="wikitable" border="1"
 |-