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IO Registers: Difference between revisions

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{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Category
! Old3DS
! Physical address start
! A9/A11
! Category
! Physaddr
! Used by
! Used by
! Comments
! Comments
|-
|-
| [[CONFIG Registers]]
| style="background: green" | Yes
| A9
| [[CONFIG9 Registers]]
| 0x10000000
| 0x10000000
| Boot9
| Boot9, Process9
|
|
|-
|-
| style="background: green" | Yes
| A9
| [[IRQ Registers]]
| [[IRQ Registers]]
| 0x10001000
| 0x10001000
| Kernel9
| Boot9, Process9, Kernel9
|
| ARM9 Interrupt Masking
|-
|-
| style="background: green" | Yes
| A9
| [[NDMA Registers]]
| [[NDMA Registers]]
| 0x10002000
| 0x10002000
| Process9
| Boot9, Process9
|
| AHB DMA Engine
|-
|-
| style="background: green" | Yes
| A9
| [[TIMER Registers]]
| [[TIMER Registers]]
| 0x10003000
| 0x10003000
| Process9
| Boot9, Process9
|
|
|-
|-
| style="background: green" | Yes
| A9
| [[CTRCARD Registers]]
| [[CTRCARD Registers]]
| 0x10004000 / 0x10005000
| 0x10004000 / 0x10005000
Line 32: Line 44:
|
|
|-
|-
| style="background: green" | Yes
| A9
| [[EMMC Registers]]
| [[EMMC Registers]]
| 0x10006000 / 0x10007000
| 0x10006000 / 0x10007000
| Boot9, Process9
| Boot9, Process9, NewKernel9Loader
| 0x10007000 is apparently not used on retail
| SD(IO) controller 1 and 3. 3 is normally mapped to ARM11.
|-
|-
| style="background: green" | Yes
| A9
| [[PXI Registers]]
| [[PXI Registers]]
| 0x10008000
| 0x10008000
Line 42: Line 58:
|  
|  
|-
|-
| style="background: green" | Yes
| A9
| [[AES Registers]]
| [[AES Registers]]
| 0x10009000
| 0x10009000
| Boot9, Process9
| Boot9, Process9, NewKernel9Loader
|
|
|-
|-
| style="background: green" | Yes
| A9
| [[SHA Registers]]
| [[SHA Registers]]
| 0x1000A000
| 0x1000A000
| Process9
| Boot9, Process9, NewKernel9Loader
|
|
|-
|-
| style="background: green" | Yes
| A9
| [[RSA Registers]]
| [[RSA Registers]]
| 0x1000B000
| 0x1000B000
Line 57: Line 79:
|
|
|-
|-
| [[XDMA Registers]]
| style="background: green" | Yes
| A9
| [[Corelink DMA Engines|XDMA Registers]]
| 0x1000C000
| 0x1000C000
| Kernel9
| Boot9, Kernel9
| CoreLink™ DMA-330. [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html Info]
| [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (AXI busmaster, two channels, uses 32-bit bus width instead of 64).
|-
|-
| style="background: green" | Yes
| A9
| [[SPICARD Registers]]
| [[SPICARD Registers]]
| 0x1000D800
| 0x1000D800
| Process9
| Process9
|
|
|-
|-style="border-top: double"
| style="background: green" | Yes
| A9
| [[CONFIG Registers]]
| [[CONFIG Registers]]
| 0x10010000
| 0x10010000
Line 72: Line 100:
|
|
|-
|-
| [[CONFIG Registers]]
| style="background: green" | Yes
| A9
| PRNG Registers
| 0x10011000
| 0x10011000
| Process9
| Boot9, Process9
|
| Used as entropy-source for seeding random number generators.
|-
|-
| ?
| style="background: green" | Yes
| A9
| [[OTP Registers]]
| 0x10012000
| 0x10012000
|
| Boot9, Kernel9, NewKernel9Loader
|
| Top secret.
|-
|-
| ?
| style="background: green" | Yes
| A9
| [[ARM7|ARM7 Registers]]
| 0x10018000
| 0x10018000
| TWL_FIRM
| TwlProcess9
|
| Used to setup the ARM7 core for AGB/TWL
|-
|-style="border-top: double"
| ?
| style="background: green" | Yes
| A11/A9
| TMIO SD(IO) controller 3
| 0x10100000
| 0x10100000
|
|  
|  
| NWM references this controller but doesn't have access to it.
|-
|-
| style="background: green" | Yes
| A11/A9
| [[HASH Registers]]
| [[HASH Registers]]
| 0x10101000
| 0x10101000
|
| [[Filesystem services]]
|  
| These registers function the same as the [[SHA Registers]], with the exception of the FIFO being located at 0x10301000.
|-
|-
| ?
| style="background: green" | Yes
| A11/A9
| [[Y2R Registers]]
| 0x10102000
| 0x10102000
|
| [[Camera Services]]
|  
| y2r
|-
|-
| [[CSND Registers]] / DSP
| style="background: green" | Yes
| A11/A9
| [[CSND Registers]]
| 0x10103000
| 0x10103000
| [[Codec Services]], [[CSND Services]], [[DSP Services]]
| TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]]
| Sound hardware.
|-style="border-top: double"
| style="background: green" | Yes
| A11/A9
| [[MTX_Registers|LgyFb bottom screen]]
| 0x10110000
| TwlBg
| IO registers used to access legacy output framebuffer, as well as configure the upscaling filter.
|-
| style="background: green" | Yes
| A11/A9
| [[MTX_Registers|LgyFb top screen]]
| 0x10111000
| TwlBg
| IO registers used to access legacy output framebuffer, as well as configure the upscaling filter.
|-style="border-top: double"
| style="background: green" | Yes
| A11/A9
| [[Camera Registers]]
| 0x10120000
| [[Camera Services]]
|  
|  
|-
|-
| style="background: green" | Yes
| A11/A9
| [[Camera Registers]]
| 0x10121000
| [[Camera Services]]
| Mirror of 0x10120000?
|-
| style="background: green" | Yes
| A11/A9
| [[WIFI Registers]]
| 0x10122000
| [[NWM Services]]
| WIFI SDIO bus registers
|-
| style="background: green" | Yes
| A11/A9
| ?
| ?
| 0x10110000
| 0x10123000
|
| [[NWM Services]]
| WIFI?
|-style="border-top: double"
| style="background: red" | No
| A11/A9
| [[MVD Registers]]
| 0x10130000
| [[MVD Services]]
|  
|  
|-
|-
| ?
| style="background: red" | No
| 0x10111000
| A11/A9
| TwlBg
| [[MVD Registers]]
|
| 0x10131000
| [[MVD Services]]
|  
|-
|-
| DSP
| style="background: red" | No
| A11/A9
| [[MVD Registers]]
| 0x10132000
| [[MVD Services]]
|
|-style="border-top: double"
| style="background: green" | Yes
| A11/A9
| [[CONFIG11 Registers]]
| 0x10140000
| 0x10140000
| Process9, Kernel11, [[DSP Services]]
| Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[SPI Services]], [[NWM Services]] (until [[11.4.0-37#NWM-sysmodule|11.4.X]])
|  
| System configuration.
|-
|-
| [[PDN Registers]] / [[CODEC Registers]]
| style="background: green" | Yes
| A11/A9
| [[PDN Registers]]
| 0x10141000
| 0x10141000
| Process9, Kernel11, [[Codec Services]]
| Process9, Boot11, Kernel11, TwlBg, [[Codec Services]], [[NWM Services]], [[SPI Services]], [[PDN Services]]
|  
| Power management
|-
|-
| style="background: green" | Yes
| A11/A9
| [[SPI Registers]]
| [[SPI Registers]]
| 0x10142000
| 0x10142000
|
| TwlBg, [[SPI Services]]
|  
|  
|-
|-
| style="background: green" | Yes
| A11/A9
| [[SPI Registers]]
| [[SPI Registers]]
| 0x10143000
| 0x10143000
|
| TwlBg, dmnt Module
| Only used under TWL_FIRM?
| Debugger related?
|-
|-
| style="background: green" | Yes
| A11/A9
| [[I2C Registers]]
| [[I2C Registers]]
| 0x10144000
| 0x10144000
| Kernel11, [[I2C Services]]
| Boot11, Kernel11, TwlBg, [[I2C Services]]
|  
| 3DS I2C interface (MCU + Cameras + LCD)
|-
|-
| [[CODEC Registers]]
| style="background: green" | Yes
| A11/A9
| [[I2S Registers]]
| 0x10145000
| 0x10145000
| [[Codec Services]]
| TwlBg, AgbBg, [[Codec Services]]
|  
| Sound input/output lines
|-
|-
| style="background: green" | Yes
| A11/A9
| [[HID Registers]]
| [[HID Registers]]
| 0x10146000
| 0x10146000
| Kernel11, [[HID Services]]
| Boot9, Boot11, Kernel11, TwlBg, [[HID Services]], dlp Services
| See [[PAD]].
| See [[PAD]].
|-
|-
| style="background: green" | Yes
| A11/A9
| [[GPIO Registers]]
| [[GPIO Registers]]
| 0x10147000
| 0x10147000
| [[GPIO Services]]
| Boot11, TwlBg, [[GPIO Services]], [[DSP Services]](v0)
|  
|  
|-  
|-  
| style="background: green" | Yes
| A11/A9
| [[I2C Registers]]
| [[I2C Registers]]
| 0x10148000
| 0x10148000
| [[I2C Services]]
| TwlBg, [[I2C Services]]
|  
| 3DS I2C interface (Gyro + IR)
|-
|-style="border-top: double"
| style="background: green" | Yes
| A11/A9
| [[SPI Registers]]
| [[SPI Registers]]
| 0x10160000
| 0x10160000
|
| Boot9, TwlBg, [[SPI Services]]
|  
|  
|-
|-
| style="background: green" | Yes
| A11/A9
| [[I2C Registers]]
| [[I2C Registers]]
| 0x10161000
| 0x10161000
| [[I2C Services]]
| Boot11, TwlBg, [[I2C Services]]
|  
| TWL I2C interface (MCU + Cameras)
|-
|-
| style="background: green" | Yes
| A11/A9
| [[MIC Registers]]
| [[MIC Registers]]
| 0x10162000
| 0x10162000
Line 177: Line 296:
|  
|  
|-
|-
| style="background: green" | Yes
| A11/A9
| [[PXI Registers]]
| [[PXI Registers]]
| 0x10163000
| 0x10163000
| Boot11, Kernel11
| Boot11, Kernel11, TwlBg, [[PXI Services]]
|  
|  
|-
|-
| style="background: green" | Yes
| A11/A9
| [[NTRCARD Registers]]
| [[NTRCARD Registers]]
| 0x10164000
| 0x10164000
| Process9
| Boot9, Process9
|
|
|-
|-
| style="background: green" | Yes
| A11/A9
| [[MP Registers]]
| [[MP Registers]]
| 0x10165000
| 0x10165000
| [[MP Services]]
|
|
|
|-style="border-top: double"
| style="background: green" | Yes
| A11/A9
|  [[MP Registers]]
| 0x10170000
| [[MP Services]]
| NTR WIFI Registers, see [http://problemkaputt.de/gbatek.htm#dswirelesscommunications GBATek].
|-
|-
| style="background: green" | Yes
| A11/A9
|  [[MP Registers]]
|  [[MP Registers]]
| 0x10170000 / 0x10171000
| 0x10171000
|
| [[MP Services]]
| Mirrored?
| NTR WIFI Registers (mirror)
|-
|-
| ?
| style="background: green" | Yes
| A11/A9
|?
| 0x10172000
| 0x10172000
|
|?
|
| NTR WIFI Unused?
|-
|-
| ?
| style="background: green" | Yes
| A11/A9
|?
| 0x10173000
| 0x10173000
|
|?
|
| NTR WIFI Unused?
|-
|-
| style="background: green" | Yes
| A11/A9
| [[MP Registers]]
| [[MP Registers]]
| 0x10174000
| 0x10174000
|
| [[MP Services]]
|
| NTR WIFI RAM
|-
|-
| style="background: green" | Yes
| A11/A9
| [[MP Registers]]
| [[MP Registers]]
| 0x10176000 / 0x10177000
| 0x10175000
|
|?
| Mirrored. Same as 0x10170000.
| NTR WIFI RAM
|-
| style="background: green" | Yes
| A11/A9
|  [[MP Registers]]
| 0x10176000
|?
| NTR WIFI Registers (mirror)
|-
| style="background: green" | Yes
| A11/A9
|  [[MP Registers]]
| 0x10177000
|?
| NTR WIFI Registers (mirror)
|-
|-
| style="background: green" | Yes
| A11/A9
| [[MP Registers]]
| [[MP Registers]]
| 0x10178000 - 0x10180000
| 0x10178000 - 0x10180000
| [[MP Services]]
| NTR WIFI WS1 Region
|-style="border-top: double"
| style="background: green" | Yes
| A11
| [[Corelink DMA Engines|CDMA]]
| 0x10200000
| Boot11, Kernel11
| [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (eight channels). Only used by bootrom on New3DS.
|-
| style="background: green" | Yes
| A11
| FCRAM configuration
| 0x10201000
| TwlBg, Kernel11 (dead code)
|
|
| Mirror of 0x10170000-0x10178000.
|-
|-
| CDMA
| style="background: green" | Yes
| 0x10200000
| A11
| Kernel11
| [[LCD Registers]]
| CoreLink™ DMA-330. [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html Info]
|-
| ?
| 0x10202000
| 0x10202000
| Kernel11, [[GSP Services]]
| TwlBg, Kernel11, [[GSP Services]]
|
|
|-
|-
| DSP
| style="background: green" | Yes
| A11
| [[DSP Registers]]
| 0x10203000
| 0x10203000
| [[DSP Services]]
| see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help.
|-style="border-top: double"
| style="background: red" | No
| A11
| ?
| 0x10204000
| ?
|  
|  
|
|-
|-
| GPU?
| style="background: red" | No
| A11
| [[Corelink DMA Engines|CDMA]]
| 0x10206000
| NewKernel11
| [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330 r1p2] (eight channels). This is the DMA engine actually being used by the New3DS ARM11 kernel.
|-
| style="background: red" | No
| A11
| [[MVD Registers]]
| 0x10207000
| [[MVD Services]]
| New 3DS only?
|-style="border-top: double"
| style="background: green" | Yes
| A11
| AXI
| 0x1020F000
| 0x1020F000
| [[GSP Services]]
| TwlBg, [[GSP Services]]
|  
| [https://developer.arm.com/documentation/ddi0422/d/programmers-model/register-summary CoreLink™ NIC-301 r1p2].
|-
|-style="border-top: double"
| [[HASH Registers]]
| style="background: green" | Yes
| 0x10301000
| A11
|  
| AHB (or AXI?) FIFOs region
|  
| 0x10300000-0x10340000
|-
|
| [[LCD Registers]]
| Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA.
|-style="border-top: double"
| style="background: green" | Yes
| A11
| [[GPU/External_Registers|GPU Registers]]
| 0x10400000
| 0x10400000
| Kernel11, [[GSP Services]]
| Boot11, Kernel11, [[GSP Services]]
|
||
|-
| ?
| 0x10420000
| [[GSP Services]]
|
 
|}
|}


IO registers starting at physical address 0x10200000 are not accessible from the ARM9(which includes all LCD/GPU registers).
IO registers starting at physical address 0x10200000 are not accessible from the ARM9 (which includes all LCD/GPU registers). It seems IO registers below physical address 0x10100000 are not accessible from the ARM11 bus.


ARM11 kernel virtual address mappings for these registers varies for different builds.
ARM11 kernel virtual address mappings for these registers varies for different builds. For ARM11 user mode applications you have:
physaddr = virtaddr - 0x1EC00000 + 0x10100000
Retrieved from "https://www.3dbrew.org/wiki/IO_Registers"